### ### Marvell 88F5182 Register Offsets ### (taken from document MV-S103345-01 Rev. C "User Manual") ### ### AHB to Mbus Bridge Registers (page 219, 242ff) 0x00020000 # Window0 Control Register 0x00020004 # Window0 Base Register 0x00020008 # Window0 Remap Low Register 0x0002000C # Window0 Remap High Register 0x00020010 # Window1 Control Register 0x00020014 # Window1 Base Register 0x00020018 # Window1 Remap Low Register 0x0002001C # Window1 Remap High Register 0x00020020 # Window2 Control Register 0x00020024 # Window2 Base Register 0x00020030 # Window3 Control Register 0x00020034 # Window3 Base Register 0x00020040 # Window4 Control Register 0x00020044 # Window4 Base Register 0x00020050 # Window5 Control Register 0x00020054 # Window5 Base Register 0x00020060 # Window6 Control Register 0x00020064 # Window6 Base Register 0x00020070 # Window7 Control Register 0x00020074 # Window7 Base Register 0x00020080 # 88F5182 Internal Registers Base Address Register 0x00020100 # CPU Configuration Register 0x00020104 # CPU Control and Status Register 0x00020108 # RSTOUTn Mask Register 0x0002010C # System Soft Reset Register 0x00020110 # AHB to Mbus Bridge Interruot Cause Register 0x00020114 # AHB to Mbus Bridge Interruot Mask Register 0x00020200 # Main Interrupt Cause Register 0x00020204 # Main IRQ Interrupt Mask Register 0x00020208 # Main FIQ Interrupt Mask Register 0x0002020C # Endpoint Interrupt Mask Register 0x00020300 # CPU Timers Control Register 0x00020310 # CPU Timer0 Reload Register 0x00020314 # CPU Timer 0 Register 0x00020318 # CPU Timer1 Reload Register 0x0002031C # CPU Timer 1 Register 0x00020320 # CPU Watchdog Timer Reload Register 0x00020324 # CPU Watchdof Timer Register 0x00020400 # Host-to-CPU Doorbell Register 0x00020404 # Host-to-CPU Doorbell Mask Register 0x00020408 # CPU-to-Host Doorbell Register 0x0002040C # CPU-to-Host Doorbell Mask Register ### DDR SDRAM Controller Registers (page 220, 260ff) 0x00001500 # CS[0]n Base Address Register 0x00001504 # CS[0]n Size Register 0x00001508 # CS[1]n Base Address Register 0x0000150C # CS[1]n Size Register 0x00001510 # CS[2]n Base Address Register 0x00001514 # CS[2]n Size Register 0x00001518 # CS[3]n Base Address Register 0x0000151C # CS[3]n Size Register 0x00001400 # DDR SDRAM Configuration Register 0x00001404 # DDR SDRAM Control Register 0x00001408 # DDR SDRAM Timing (Low) Register 0x0000140C # DDR SDRAM Timing (High) Register 0x00001428 # DDR SDRAM2 Timing (Low) Register 0x0000147C # DDR SDRAM2 Timing (High) Register 0x00001410 # DDR SDRAM Address Control Register 0x00001414 # DDR SDRAM Open Pages Control Register 0x00001418 # DDR SDRAM Operation Register 0x0000142C # DDR SDRAM Operation Control Register 0x0000141C # DDR SDRAM Mode Register 0x00001420 # Extended DDR SDRAM Mode Register 0x00001480 # DDR SDRAM Initialization Control Register 0x000014C0 # DDR SDRAM Address/Control Pads Calibration Register 0x000014C4 # DDR SDRAM Data Pads Calibration Register 0x00001494 # DDR2 SDRAM ODT Control (Low) Register 0x00001498 # DDR2 SDRAM ODT Control (High) Register 0x0000149C # DDR2 SDRAM ODT Control Register 0x00001430 # DDR SDRAM Interface Mbus Control (Low) Register 0x00001434 # DDR SDRAM Interface Mbus Control (High) Register 0x00001438 # DDR SDRAM Interface Mbus Timeout Register 0x000014B0 # DDR SDRAM MMask Register ### PCI Express Interface Registers (page 222, 277ff) 0x00041804 # PCI Express BAR1 Control Register 0x00041808 # PCI Express BAR2 Control Register 0x0004180C # PCI Express Expansion ROM BAR Control Register 0x000418F8 # PCI Express Configuration Address Register 0x000418FC # PCI Express Configuration Data Register 0x00041900 # PCI Express Interrupt Cause 0x00041910 # PCI Express Interrupt Mask 0x00041820 # PCI Express Window0 Control Register 0x00041824 # PCI Express Window0 Base Register 0x0004182C # PCI Express Window0 Remap Register 0x00041830 # PCI Express Window1 Control Register 0x00041834 # PCI Express Window1 Base Register 0x0004183C # PCI Express Window1 Remap Register 0x00041840 # PCI Express Window2 Control Register 0x00041844 # PCI Express Window2 Base Register 0x0004184C # PCI Express Window2 Remap Register 0x00041850 # PCI Express Window3 Control Register 0x00041854 # PCI Express Window3 Base Register 0x0004185C # PCI Express Window3 Remap Register 0x00041860 # PCI Express Window4 Control Register 0x00041864 # PCI Express Window4 Base Register 0x0004186C # PCI Express Window4 Remap Register 0x00041880 # PCI Express Window5 Control Register 0x00041884 # PCI Express Window5 Base Register 0x0004188C # PCI Express Window5 Remap Register 0x000418B0 # PCI Express Default Window Control Register 0x000418C0 # PCI Express Expansion ROM Window Control Register 0x000418C4 # PCI Express Expansion ROM Window Remap Register 0x00041A00 # PCI Express Control Register 0x00041A04 # PCI Express Status Register 0x00041A10 # PCI Express Completion Timeout Register 0x00041A20 # PCI Express Flow Control Register 0x00041A40 # PCI Express Acknowledge Timers (1X) Register 0x00041A60 # PCI Express Debug Control Register 0x00041AB0 # PCI Express TL Control Register 0x00040000 # PCI Express Device and Vendor ID Register 0x00040004 # PCI Express Command and Status Register 0x00040008 # PCI Express Class Code and Revision ID Register 0x0004000C # PCI Express BIST, Header Type and Cache Line Size Register 0x00040010 # PCI Express BAR0 Internal Register 0x00040014 # PCI Express BAR0 Internal (High) Register 0x00040018 # PCI Express BAR1 Register 0x0004001C # PCI Express BAR1 (High) Register 0x00040020 # PCI Express BAR2 Register 0x00040024 # PCI Express BAR2 (High) Register 0x0004002C # PCI Express Subsystem Device and Vendor ID 0x00040030 # PCI Express Expansion ROM BAR Register 0x00040034 # PCI Express Capability List Pointer Register 0x0004003C # PCI Express Interrupt Pin and Line Register 0x00040040 # PCI Express Power Management Capability Header Register 0x00040044 # PCI Express Power Management Control and Status Register 0x00040050 # PCI Express MSI Message Control Register 0x00040054 # PCI Express MSI Message Address Register 0x00040058 # PCI Express MSI Message Address (High) Register 0x0004005C # PCI Express MSI Message Data Register 0x00040060 # PCI Express Capability Register 0x00040064 # PCI Express Device Capabilities Register 0x00040068 # PCI Express Device Control Status Register 0x0004006C # PCI Express Link Capabilities Register 0x00040070 # PCI Express Link Control Status Register 0x00040100 # PCI Express Advanced Error Report Header Register 0x00040104 # PCI Express Uncorrectable Error Status Register 0x00040108 # PCI Express Uncorrectable Error Mask Register 0x0004010C # PCI Express Uncorrectable Error Severity Register 0x00040110 # PCI Express Correctable Error Status Register 0x00040114 # PCI Express Correctable Error Mask Register 0x00040118 # PCI Express Advanced Error Capability and Control Register 0x0004011C # PCI Express Header Log First DWORD Register 0x00040120 # PCI Express Header Log Second DWORD Register 0x00040124 # PCI Express Header Log Third DWORD Register 0x00040128 # PCI Express Header Log Fourth DWORD Register ### PCI Interface Registers (page 224, 317ff) 0x00030C08 # CSn[0] BAR Size 0x00030D08 # CSn[1] BAR Size 0x00030C0C # CSn[2] BAR Size 0x00030D0C # CSn[3] BAR Size 0x00030C10 # DevCSn[0] BAR Size 0x00030D10 # DevCSn[1] BAR Size 0x00030D18 # DevCSn[2] BAR Size 0x00030D14 # Boot CSn BAR Size 0x00030D1C # P2P Mem0 BAR Size 0x00030D24 # P2P I/O BAR Size 0x00030D2C # Expansion ROM BAR Size 0x00030C3C # Base Address Registers Enable 0x00030C48 # CSn[0] Base Address Remap 0x00030D48 # CSn[1] Base Address Remap 0x00030C4C # CSn[2] Base Address Remap 0x00030D4C # CSn[3] Base Address Remap 0x00030C50 # DevCSn[0] Base Address Remap 0x00030D50 # DevCSn[1] Base Address Remap 0x00030D58 # DevCSn[2] Base Address Remap 0x00030D54 # BootCSn Base Address Remap 0x00030D5C # P2P Mem0 Base Address Remap (Low) 0x00030D60 # P2P Mem0 Base Address Remap (High) 0x00030D6C # P2P I/O Base Address Remap 0x00030F38 # Expansion ROM Base Address Remap 0x00030C1C # DRAM BAR Bank Select 0x00030D3C # PCI Address Decode Control 0x00031D20 # PCI DLL Control 0x00031D1C # PCI/MPP Pads Calibration 0x00030C00 # PCI Command 0x00030D00 # PCI Mode 0x00030C04 # PCI Retry 0x00030D04 # PCI Discard Timer 0x00030C38 # MSI Trigger Timer 0x00031D00 # PCI Arbiter Control 0x00031D14 # PCI P2P Configuration 0x00031E00 # PCI Access Control Base 0 (Low) 0x00031E04 # PCI Access Control Base 0 (High) 0x00031E08 # PCI Access Control Size 0 0x00031E10 # PCI Access Control Base 1 (Low) 0x00031E14 # PCI Access Control Base 1 (High) 0x00031E18 # PCI Access Control Size 1 0x00031E20 # PCI Access Control Base 2 (Low) 0x00031E24 # PCI Access Control Base 2 (High) 0x00031E28 # PCI Access Control Size 2 0x00031E30 # PCI Access Control Base 3 (Low) 0x00031E34 # PCI Access Control Base 3 (High) 0x00031E38 # PCI Access Control Size 3 0x00031E40 # PCI Access Control Base 4 (Low) 0x00031E44 # PCI Access Control Base 4 (High) 0x00031E48 # PCI Access Control Size 4 0x00031E50 # PCI Access Control Base 5 (Low) 0x00031E54 # PCI Access Control Base 5 (High) 0x00031E58 # PCI Access Control Size 5 0x00030C78 # PCI Configuration Address 0x00030C7C # PCI Configuration Data 0x00030C34 # PCI Interrupt Acknowledge 0x00030C28 # PCI SERRn Mask 0x00031D58 # PCI Interrupt Cause 0x00031D5C # PCI Interrupt Mask 0x00031D40 # PCI Error Address (Low) 0x00031D44 # PCI Error Address (High) 0x00031D50 # PCI Error Command Function 0 Configuration Registers: Offset: 0x00 # PCI Device and Vendor ID Offset: 0x04 # PCI Status and Command Offset: 0x08 # PCI Class Code and Revision ID Offset: 0x0C # PCI BIST, Header Type/Initial Value, Latency Timer, and Cache Line Offset: 0x10 # PCI CSn[0] Base Address (Low) Offset: 0x14 # PCI CSn[0] Base Address (High) Offset: 0x18 # PCI CSn[1] Base Address (Low) Offset: 0x1C # PCI CSn[1] Base Address (High) Offset: 0x20 # PCI Internal Registers Memory Mapped Base Address (Low) Offset: 0x24 # PCI Internal Registers Memory Mapped Base Address (High) Offset: 0x2C # PCI Subsystem Device and Vendor ID Offset: 0x30 # PCI Expansion ROM Base Address Register Offset: 0x34 # PCI Capability List Pointer Register Offset: 0x3C # PCI Interrupt Pin and Line Offset: 0x40 # PCI Power Management Offset: 0x44 # PCI Power Management Control and Status Offset: 0x48 # PCI VPD Address Offset: 0x4C # PCI VPD Data Offset: 0x50 # PCI MSI Message Control Offset: 0x54 # PCI MSI Message Address Offset: 0x58 # PCI MSI Message Upper Address Offset: 0x5C # PCI Message Data Offset: 0x68 # CompactPCI HotSwap Function 1 Configuration Registers: Offset: 0x10 # PCI CSn[2] Base Address (Low) Offset: 0x14 # PCI CSn[2] Base Address (High) Offset: 0x18 # PCI CSn[3] Base Address (Low) Offset: 0x1C # PCI CSn[3] Base Address (High) Function 2 Configuration Registers: Offset: 0x10 # PCI DevCS[0] Base Address (Low) Offset: 0x14 # PCI DevCSn[0] Base Address (High) Offset: 0x18 # PCI DevCSn[1] Base Address (Low) Offset: 0x1C # PCI DevCSn[1] Base Address (High) Offset: 0x20 # PCI DevCSn[2] Base Address (Low) Offset: 0x24 # PCI DevCSn[2] Base Address (High) Offset: 0x18 # PCI BootCS Base Address (Low) Offset: 0x1C # PCI BootCSn Base Address (High) Offset: 0x10 # PCI P2P Mem0 Base Address (Low) Offset: 0x14 # PCI P2P Mem0 Base Address (High) Offset: 0x20 # PCI P2P I/O Base Address Offset: 0x24 # PCI Internal Registers I/O Mapped Base Address ### Serial-ATA Host Controller (SATAHC) Registers (page 228, 358ff) 0x00080000 # SATAHC Configuration Register 0x00080004 # SATAHC Request Queue Out-Pointer Register 0x00080008 # SATAHC Response Queue In-Pointer Register 0x0008000C # SATAHC Interrupt Coalescing Threshold Register 0x00080010 # SATAHC Interrupt Time Threshold Register 0x00080014 # SATAHC Interrupt Cause Register 0x00080018 # Reserved Register 0x00080020 # SATAHC Main Interrupt Cause Register 0x00080024 # SATAHC Main Interrupt Mask Register 0x0008002C # SATAHC LED Configuration Register 0x00080030 # Window0 Control Register 0x00080034 # Window0 Base Register 0x00080040 # Window1 Control Register 0x00080044 # Window1 Base Register 0x00080050 # Window2 Control Register 0x00080054 # Window2 Base Register 0x00080060 # Window3 Control Register 0x00080064 # Window3 Base Register 0x00082000 # Port 0: EDMA Configuration Register 0x00082004 # Port 0: EDMA Timer Register 0x00082008 # Port 0: EDMA Interrupt Error Cause Register 0x0008200C # Port 0: EDMA Interrupt Error Mask Register 0x00082010 # Port 0: EDMA Request Queue Base Address High Register 0x00082014 # Port 0: EDMA Request Queue In-Pointer Register 0x00082018 # Port 0: EDMA Request Queue Out-Pointer Register 0x0008201C # Port 0: EDMA Response Queue Base Address High Register 0x00082020 # Port 0: EDMA Response Queue In-Pointer Register 0x00082024 # Port 0: EDMA Response Queue Out-Pointer Register 0x00082028 # Port 0: EDMA Command Register 0x0008202C # Port 0: EDMA Test Control Register 0x00082030 # Port 0: EDMA Status Register 0x00082034 # Port 0: EDMA IORdy Timeout Register 0x00082040 # Port 0: EDMA Command Delay Threshold Register 0x00082060 # Port 0: EDMA Halt Conditions Register 0x00082094 # Port 0: EDMA NCQ0 Done/TCQ0 Outstanding Status Register 0x00082098 # Port 0: EDMA NCQ1 Done/TCQ1 Outstanding Status Register 0x0008209C # Port 0: EDMA NCQ2 Done/TCQ2 Outstanding Status Register 0x000820A0 # Port 0: EDMA NCQ3 Done/TCQ3 Outstanding Status Register 0x00082224 # Port 0: Basic DMA Command Register 0x00082228 # Port 0: Basic DMA Status Register 0x0008222C # Port 0: Descriptor Table Low Base Address Register 0x00082230 # Port 0: Descriptor Table High Base Address Register 0x00082234 # Port 0: Data Region Low Address Register 0x00082238 # Port 0: Data Region High Address Register 0x00082300 # Port 0: SStatus Register 0x00082304 # Port 0: SError Register 0x00082340 # Port 0: SError Interrupt Mask Register 0x00082308 # Port 0: SControl Register 0x0008230C # Port 0: LTMode Register 0x00082310 # Port 0: PHY Mode 3 Register 0x00082314 # Port 0: PHY Mode 4 Register 0x0008232C # Port 0: PHY Mode 1 Register 0x00082330 # Port 0: PHY Mode 2 Register 0x00082334 # Port 0: BIST Control Register 0x00082338 # Port 0: BIST-DW1 Register 0x0008233C # Port 0: BIST-DW2 Register 0x00082050 # Port 0: Serial-ATA Interface Configuration Register 0x00082344 # Port 0: Serial-ATA Interface Control Register 0x00082348 # Port 0: Serial-ATA Interface Test Control Register 0x0008234C # Port 0: Serial-ATA Interface Status Register 0x0008235C # Port 0: Vendor Unique Register 0x00082360 # Port 0: FIS Configuration Register 0x00082364 # Port 0: FIS Interrupt Cause Register 0x00082368 # Port 0: FIS Interrupt Mask Register 0x00082370 # Port 0: FIS DW0 Register 0x00082374 # Port 0: FIS DW1 Register 0x00082378 # Port 0: FIS DW2 Register 0x0008237C # Port 0: FIS DW3 Register 0x00082380 # Port 0: FIS DW4 Register 0x00082384 # Port 0: FIS DW5 Register 0x00082388 # Port 0: FIS DW6 Register 0x00084000 # Port 1: EDMA Configuration Register 0x00084004 # Port 1: EDMA Timer Register 0x00084008 # Port 1: EDMA Interrupt Error Cause Register 0x0008400C # Port 1: EDMA Interrupt Error Mask Register 0x00084010 # Port 1: EDMA Request Queue Base Address High Register 0x00084014 # Port 1: EDMA Request Queue In-Pointer Register 0x00084018 # Port 1: EDMA Request Queue Out-Pointer Register 0x0008401C # Port 1: EDMA Response Queue Base Address High Register 0x00084020 # Port 1: EDMA Response Queue In-Pointer Register 0x00084024 # Port 1: EDMA Response Queue Out-Pointer Register 0x00084028 # Port 1: EDMA Command Register 0x0008402C # Port 1: EDMA Test Control Register 0x00084030 # Port 1: EDMA Status Register 0x00084034 # Port 1: EDMA IORdy Timeout Register 0x00084040 # Port 1: EDMA Command Delay Threshold Register 0x00084060 # Port 1: EDMA Halt Conditions Register 0x00084094 # Port 1: EDMA NCQ0 Done/TCQ0 Outstanding Status Register 0x00084098 # Port 1: EDMA NCQ1 Done/TCQ1 Outstanding Status Register 0x0008409C # Port 1: EDMA NCQ2 Done/TCQ2 Outstanding Status Register 0x000840A0 # Port 1: EDMA NCQ3 Done/TCQ3 Outstanding Status Register 0x00084224 # Port 1: Basic DMA Command Register 0x00084228 # Port 1: Basic DMA Status Register 0x0008422C # Port 1: Descriptor Table Low Base Address Register 0x00084230 # Port 1: Descriptor Table High Base Address Register 0x00084234 # Port 1: Data Region Low Address Register 0x00084238 # Port 1: Data Region High Address Register 0x00084300 # Port 1: SStatus Register 0x00084304 # Port 1: SError Register 0x00084340 # Port 1: SError Interrupt Mask Register 0x00084308 # Port 1: SControl Register 0x0008430C # Port 1: LTMode Register 0x00084310 # Port 1: PHY Mode 3 Register 0x00084314 # Port 1: PHY Mode 4 Register 0x0008432C # Port 1: PHY Mode 1 Register 0x00084330 # Port 1: PHY Mode 2 Register 0x00084334 # Port 1: BIST Control Register 0x00084338 # Port 1: BIST-DW1 Register 0x0008433C # Port 1: BIST-DW2 Register 0x00084050 # Port 1: Serial-ATA Interface Configuration Register 0x00084344 # Port 1: Serial-ATA Interface Control Register 0x00084348 # Port 1: Serial-ATA Interface Test Control Register 0x0008434C # Port 1: Serial-ATA Interface Status Register 0x0008435C # Port 1: Vendor Unique Register 0x00084360 # Port 1: FIS Configuration Register 0x00084364 # Port 1: FIS Interrupt Cause Register 0x00084368 # Port 1: FIS Interrupt Mask Register 0x00084370 # Port 1: FIS DW0 Register 0x00084374 # Port 1: FIS DW1 Register 0x00084378 # Port 1: FIS DW2 Register 0x0008437C # Port 1: FIS DW3 Register 0x00084380 # Port 1: FIS DW4 Register 0x00084384 # Port 1: FIS DW5 Register 0x00084388 # Port 1: FIS DW6 Register ### Gigabit Ethernet Controller Registers (page 231, 408ff) 0x00072000 # PHY Address 0x00072004 # SMI 0x00072008 # Ethernet Unit Default Address (EUDA) 0x0007200C # Ethernet Unit Default ID (EUDID) 0x00072014 # Ethernet Unit Reserved (EU) 0x00072080 # Ethernet Unit Interrupt Cause (EUIC) 0x00072084 # Ethernet Unit Interrupt Mask (EUIM) 0x00072094 # Ethernet Unit Error Address (EUEA) 0x00072098 # Ethernet Unit Internal Address Error (EUIAE) 0x000720A0 # Ethernet Unit Port Pads Calibration (EUPCR) 0x000720B0 # Ethernet Unit Control (EUC) 0x00072200 # Base Address 0 (BA0) 0x00072204 # Size (S) 0 (SR0) 0x00072208 # Base Address 1 (BA1) 0x0007220C # Size (S) 1 (SR1) 0x00072210 # Base Address 2 (BA2) 0x00072214 # Size (S) 2 (SR2) 0x00072218 # Base Address 3 (BA3) 0x0007221C # Size (S) 3 (SR3) 0x00072220 # Base Address 4 (BA4) 0x00072224 # Size (S) 4 (SR4) 0x00072228 # Base Address 5 (BA5) 0x0007222C # Size (S) 5 (SR5) 0x00072280 # High Address Remap (HA) (HARR0) 0x00072284 # High Address Remap (HA) (HARR1) 0x00072288 # High Address Remap (HA) (HARR2) 0x0007228C # High Address Remap (HA) (HARR3) 0x00072290 # Base Address Enable (BARE) 0x00072294 # Ethernet Port Access Protect (EPAP) 0x00072400 # Port Configuration (GEC) 0x00072404 # Port Configuration Extend (GECX) 0x00072408 # MII Serial Parameters 0x0007240C # GMII Serial Parameters 0x00072410 # VLAN EtherType (EVLANE) 0x00072414 # MAC Address Low (MACAL) 0x00072418 # MAC Address High (MACAH) 0x0007241C # SDMA Configuration (SDC) 0x00072420 # IP Differentiated Services CodePoint 0 to Priority (DSCP0) 0x00072424 # IP Differentiated Services CodePoint 1 to Priority (DSCP1) 0x00072428 # IP Differentiated Services CodePoint 2 to Priority (DSCP2) 0x0007242C # IP Differentiated Services CodePoint 2(3?) to Priority (DSCP3) 0x00072430 # IP Differentiated Services CodePoint 2(4?) to Priority (DSCP4) 0x00072434 # IP Differentiated Services CodePoint 2(5?) to Priority (DSCP5) 0x00072438 # IP Differentiated Services CodePoint 6 to Priority (DSCP6) 0x0007243C # Port Serial Control (PSC) 0x00072440 # VLAN Priority Tag to Priority (VPT2P) 0x00072444 # Ethernet Port Status (PS) 0x00072448 # Transmit Queue Command (TQC) 0x00072458 # Maximum Transmit Unit (MTU) 0x00072460 # Port Interrupt Cause (IC) 0x00072464 # Port Interrupt Cause Extend (ICE) 0x00072468 # Port Interrupt Mask (PIM) 0x0007246C # Port Extend Interrupt Mask (PEIM) 0x00072470 # Port Rx FIFO Urgent Threshold (PRFUT) 0x00072474 # Port Tx FIFO Urgent Threshold (PTFUT) 0x0007247C # Port Rx Minimal Frame Size (PMFS) 0x00072484 # Port Rx Discard Frame Counter (GEDFC) 0x00072488 # Port Overrun Frame Counter (POFC) 0x00072494 # Port Internal Address Error (EUIAE) 0x0007260C # Ethernet Current Receive Descriptor Pointers (CRDP) Q0 0x0007261C # Ethernet Current Receive Descriptor Pointers (CRDP) Q1 0x0007262C # Ethernet Current Receive Descriptor Pointers (CRDP) Q2 0x0007263C # Ethernet Current Receive Descriptor Pointers (CRDP) Q3 0x0007264C # Ethernet Current Receive Descriptor Pointers (CRDP) Q4 0x0007265C # Ethernet Current Receive Descriptor Pointers (CRDP) Q5 0x0007266C # Ethernet Current Receive Descriptor Pointers (CRDP) Q6 0x0007267C # Ethernet Current Receive Descriptor Pointers (CRDP) Q7 0x00072680 # Receive Queue Command (RQC) 0x00072684 # Transmit Current Served Descriptor Pointer 0x000726C0 # Transmit Current Queue Descriptor Pointer (TCQDP) Q0 0x00072700 # Transmit Queue Token-Bucket Counter (TQxTBC) Q0 0x00072704 # Transmit Queue Token Bucket Configuration (TQxTBC) Q0 0x00072708 # Transmit Queue Arbiter Configuration (TQxAC) Q0 0x00072710 # Transmit Queue Token-Bucket Counter (TQxTBC) Q1 0x00072714 # Transmit Queue Token Bucket Configuration (TQxTBC) Q1 0x00072718 # Transmit Queue Arbiter Configuration (TQxAC) Q1 0x00072720 # Transmit Queue Token-Bucket Counter (TQxTBC) Q2 0x00072724 # Transmit Queue Token Bucket Configuration (TQxTBC) Q2 0x00072728 # Transmit Queue Arbiter Configuration (TQxAC) Q2 0x00072730 # Transmit Queue Token-Bucket Counter (TQxTBC) Q3 0x00072734 # Transmit Queue Token Bucket Configuration (TQxTBC) Q3 0x00072738 # Transmit Queue Arbiter Configuration (TQxAC) Q3 0x00072740 # Transmit Queue Token-Bucket Counter (TQxTBC) Q4 0x00072744 # Transmit Queue Token Bucket Configuration (TQxTBC) Q4 0x00072748 # Transmit Queue Arbiter Configuration (TQxAC) Q4 0x00072750 # Transmit Queue Token-Bucket Counter (TQxTBC) Q5 0x00072754 # Transmit Queue Token Bucket Configuration (TQxTBC) Q5 0x00072758 # Transmit Queue Arbiter Configuration (TQxAC) Q5 0x00072760 # Transmit Queue Token-Bucket Counter (TQxTBC) Q6 0x00072764 # Transmit Queue Token Bucket Configuration (TQxTBC) Q6 0x00072768 # Transmit Queue Arbiter Configuration (TQxAC) Q6 0x00072770 # Transmit Queue Token-Bucket Counter (TQxTBC) Q7 0x00072774 # Transmit Queue Token Bucket Configuration (TQxTBC) Q7 0x00072778 # Transmit Queue Arbiter Configuration (TQxAC) Q7 0x00073400–0x000734FC # Destination Address Filter Special Multicast Table (DFSMT) 0x00073500–0x000735FC # Destination Address Filter Other Multicast Table (DFUT) 0x00073600–0x0007360C # Destination Address Filter Unicast Table (DFUT) 0x00073000–0x0007307C # MAC MIB Counters ### USB 2.0 Registers (page 233, 443ff) 0x00050300 # Port0: USB 2.0 Bridge Control Register 0x00050310 # Port0: USB 2.0 Bridge Interrupt Cause Register 0x00050314 # Port0: USB 2.0 Bridge Interrupt Mask Register 0x0005031C # Port0: USB 2.0 Bridge Error Address Register 0x00050320 # Port0: USB 2.0 Window0 Control Register 0x00050324 # Port0: USB 2.0 Window0 Base Register 0x00050330 # Port0: USB 2.0 Window1 Control Register 0x00050334 # Port0: USB 2.0 Window1 Base Register 0x00050340 # Port0: USB 2.0 Window2 Control Register 0x00050344 # Port0: USB 2.0 Window2 Base Register 0x00050350 # Port0: USB 2.0 Window3 Control Register 0x00050354 # Port0: USB 2.0 Window3 Base Register 0x00050400 # Port0: USB 2.0 Power Control Register 0x000A0300 # Port1: USB 2.0 Bridge Control Register 0x000A0314 # Port1: USB 2.0 Bridge Interrupt Mask Register 0x000A031C # Port1: USB 2.0 Bridge Error Address Register 0x000A0320 # Port1: USB 2.0 Window0 Control Register 0x000A0324 # Port1: USB 2.0 Window0 Base Register 0x000A0330 # Port1: USB 2.0 Window1 Control Register 0x000A0334 # Port1: USB 2.0 Window1 Base Register 0x000A0340 # Port1: USB 2.0 Window2 Control Register 0x000A0344 # Port1: USB 2.0 Window2 Base Register 0x000A0350 # Port1: USB 2.0 Window3 Control Register 0x000A0354 # Port1: USB 2.0 Window3 Base Register 0x000A0400 # Port1: USB 2.0 Power Control Register ### Cryptographic Engine and Security Accelerator Registers (page 234, 451ff) 0x0009DD78 # DES Data Out Low Register 0x0009DD7C # DES Data Out High Register 0x0009DD70 # DES Data Buffer Low Register 0x0009DD74 # DES Data Buffer High Register 0x0009DD40 # DES Initial Value Low Register 0x0009DD44 # DES Initial Value High Register 0x0009DD48 # DES Key0 Low Register 0x0009DD4C # DES Key0 High Register 0x0009DD50 # DES Key1 Low Register 0x0009DD54 # DES Key1 High Register 0x0009DD60 # DES Key2 Low Register 0x0009DD64 # DES Key2 High Register 0x0009DD58 # DES Command Register 0x0009DD38 # SHA-1/MD5 Data In Register 0x0009DD20 # SHA-1/MD5 Bit Count Low Register 0x0009DD24 # SHA-1/MD5 Bit Count High Register 0x0009DD00 # SHA-1/MD5 Initial Value/Digest A Register 0x0009DD04 # SHA-1/MD5 Initial Value/Digest B Register 0x0009DD08 # SHA-1/MD5 Initial Value/Digest C Register 0x0009DD0C # SHA-1/MD5 Initial Value/Digest D Register 0x0009DD10 # SHA-1 Initial Value/Digest E Register 0x0009DD18 # SHA-1/MD5 Authentication Command Register 0x0009DDA0 # AES Encryption Data In/Out Column 3 Register 0x0009DDA4 # AES Encryption Data In/Out Column 2 Register 0x0009DDA8 # AES Encryption Data In/Out Column 1 Register 0x0009DDAC # AES Encryption Data In/Out Column 0 Register 0x0009DD90 # AES Encryption Key Column 3 Register 0x0009DD94 # AES Encryption Key Column 2 Register 0x0009DD98 # AES Encryption Key Column 1 Register 0x0009DD9C # AES Encryption Key Column 0 Register 0x0009DD80 # AES Encryption Key Column 7 Register 0x0009DD84 # AES Encryption Key Column 6 Register 0x0009DD88 # AES Encryption Key Column 5 Register 0x0009DD8C # AES Encryption Key Column 4 Register 0x0009DDB0 # AES Encryption Command Register 0x0009DDE0 # AES Decryption Data In/Out Column 3 Register 0x0009DDE4 # AES Decryption Data In/Out Column 2 Register 0x0009DDE8 # AES Decryption Data In/Out Column 1 Register 0x0009DDEC # AES Decryption Data In/Out Column 0 Register 0x0009DDD0 # AES Decryption Key Column 3 Register 0x0009DDD4 # AES Decryption Key Column 2 Register 0x0009DDD8 # AES Decryption Key Column 1 Register 0x0009DDDC # AES Decryption Key Column 0 Register 0x0009DDC0 # AES Decryption Key Column 7 Register 0x0009DDC4 # AES Decryption Key Column 6 Register 0x0009DDC8 # AES Decryption Key Column 5 Register 0x0009DDCC # AES Decryption Key Column 4 Register 0x0009DDF0 # AES Decryption Command Register 0x0009DE00 # Security Accelerator Command Register 0x0009DE04 # Security Accelerator Descriptor Pointer Session 0 Register 0x0009DE14 # Security Accelerator Descriptor Pointer Session 1 Register 0x0009DE08 # Security Accelerator Configuration Register 0x0009DE0C # Security Accelerator Status Register 0x0009DE20 # Cryptographic Engines and Security Accelerator Interrupt Cause Register 0x0009DE24 # Cryptographic Engines and Security Accelerator Interrupt Mask Register ### Two-Wire Serial Interface (TWSI) Registers (page 236, 470ff) 0x00011000 # TWSI Slave Address 0x00011010 # TWSI Extended Slave Address 0x00011004 # TWSI Data 0x00011008 # TWSI Control 0x0001100C # TWSI Status 0x0001100C # TWSI Baud Rate 0x0001101C # TWSI Soft Reset ### UART Interface Registers (page 236, 475ff) 0x00012000 # UART 0: Receive Buffer Register (RBR) 0x00012000 # UART 0: Transmit Holding Register (THR) 0x00012000 # UART 0: Divisor Latch Low (DLL) Register 0x00012004 # UART 0: Interrupt Enable Register (IER) 0x00012004 # UART 0: Divisor Latch High (DLH) Register 0x00012008 # UART 0: Interrupt Identity Register (IIR) 0x00012008 # UART 0: FIFO Control Register (FCR) 0x0001200C # UART 0: Line Control Register (LCR) 0x00012010 # UART 0: Modem Control Register (MCR) 0x00012014 # UART 0: Line Status Register (LSR) 0x00012018 # UART 0: Modem Status Register (MSR) 0x0001201C # UART 0: Scratch Pad Register (SCR) 0x00012100 # UART 1: Receive Buffer Register (RBR) 0x00012100 # UART 1: Transmit Holding Register (THR) 0x00012100 # UART 1: Divisor Latch Low (DLL) Register 0x00012104 # UART 1: Interrupt Enable Register (IER) 0x00012104 # UART 1: Divisor Latch High (DLH) Register 0x00012108 # UART 1: Interrupt Identity Register (IIR) 0x00012108 # UART 1: FIFO Control Register (FCR) 0x0001210C # UART 1: Line Control Register (LCR) 0x00012110 # UART 1: Modem Control Register (MCR) 0x00012114 # UART 1: Line Status Register (LSR) 0x00012118 # UART 1: Modem Status Register (MSR) 0x0001211C # UART 1: Scratch Pad Register (SCR) ### Device Controller Registers (page 237, 483ff) 0x0001045C # Device Bank0 Parameters Register 0x00010460 # Device Bank1 Parameters Register 0x00010464 # Device Bank2 Parameters Register 0x0001046C # Boot Device Parameters Register 0x000104E8 # NAND Flash Control Register 0x000104C0 # Device Interface Control 0x000104D0 # Device Interrupt Cause 0x000104D4 # Device Interrupt Mask Register ### IDMA Controller Interface Registers (page 237, 488ff) 0x00060800 # Channel 0 IDMA Byte Count Register 0x00060804 # Channel 1 IDMA Byte Count Register 0x00060808 # Channel 2 IDMA Byte Count Register 0x0006080C # Channel 3 IDMA Byte Count Register 0x00060810 # Channel 0 IDMA Source Address Register 0x00060814 # Channel 1 IDMA Source Address Register 0x00060818 # Channel 2 IDMA Source Address Register 0x0006081C # Channel 3 IDMA Source Address Register 0x00060820 # Channel 0 IDMA Destination Address Register 0x00060824 # Channel 1 IDMA Destination Address Register 0x00060828 # Channel 2 IDMA Destination Address Register 0x0006082C # Channel 3 IDMA Destination Address Register 0x00060830 # Channel 0 Next Descriptor Pointer Register 0x00060834 # Channel 1 Next Descriptor Pointer Register 0x00060838 # Channel 2 Next Descriptor Pointer Register 0x0006083C # Channel 3 Next Descriptor Pointer Register 0x00060870 # Channel 0 Current Descriptor Pointer Register 0x00060874 # Channel 1 Current Descriptor Pointer Register 0x00060878 # Channel 2 Current Descriptor Pointer Register 0x0006087C # Channel 3 Current Descriptor Pointer Register 0x00060A00 # Base Address Register 0 BAR0 0x00060A04 # Size Register 0 SR0 0x00060A08 # Base Address Register 1 BAR1 0x00060A0C # Size Register 1 SR1 0x00060A10 # Base Address Register 2 BAR2 0x00060A14 # Size Register 2 SR2 0x00060A18 # Base Address Register 3 BAR3 0x00060A1C # Size Register 3 SR3 0x00060A20 # Base Address Register 4 BAR4 0x00060A24 # Size Register 4 SR4 0x00060A28 # Base Address Register 5 BAR5 0x00060A2C # Size Register 5 SR5 0x00060A30 # Base Address Register 6 BAR6 0x00060A34 # Size Register 6 SR6 0x00060A38 # Base Address Register 7 BAR7 0x00060A3C # Size Register 7 SR7 0x00060A60 # High Address Remap 0 Register 0x00060A64 # High Address Remap 1 Register 0x00060A68 # High Address Remap 2 Register 0x00060A6C # High Address Remap 3 Register 0x00060A80 # Base Address Enable Register 0x00060A70 # Channel 0 Access Protect Register 0x00060A74 # Channel 1 Access Protect Register 0x00060A78 # Channel 2 Access Protect Register 0x00060A7C # Channel 3 Access Protect Register 0x00060840 # Channel 0 Control (Low) Register 0x00060844 # Channel 1 Control (Low) Register 0x00060848 # Channel 2 Control (Low) Register 0x0006084C # Channel 3 Control (Low) Register 0x00060880 # Channel 0 Control (High) Register 0x00060884 # Channel 1 Control (High) Register 0x00060888 # Channel 2 Control (High) Register 0x0006088C # Channel 3 Control (High) Register 0x000608C0 # Interrupt Cause Register 0x000608C4 # Interrupt Mask Register 0x000608C8 # Error Address Register 0x000608CC # Error Select Register ### XOR Engine Registers (page 238, 498ff) 0x00060900 # XOR Engine Channel Arbiter (XECHAR) 0x00060910 # XOR Engine [0..1] Configuration (XE0CR) 0x00060914 # XOR Engine [0..1] Configuration (XE1CR) 0x00060920 # XOR Engine [0..1] Activation (XE0ACTR) 0x00060924 # XOR Engine [0..1] Activation (XE1ACTR) 0x00060930 # XOR Engine Interrupt Cause (XEICR) 0x00060940 # XOR Engine Interrupt Mask (XEIMR) 0x00060950 # XOR Engine Error Cause (XEECR) 0x00060960 # XOR Engine Error Address (XEEAR) 0x00060B00 # XOR Engine [0..1] Next Descriptor Pointer (XE0NDPR) 0x00060B04 # XOR Engine [0..1] Next Descriptor Pointer (XE1NDPR) 0x00060B10 # XOR Engine [0..1] Current Descriptor Pointer (XE0CDPR) 0x00060B14 # XOR Engine [0..1] Current Descriptor Pointer (XE1CDPR) 0x00060B20 # XOR Engine [0..1] Byte Count (XE0BCR) 0x00060B24 # XOR Engine [0..1] Byte Count (XE1BCR) 0x00060B40 # XOR Engine [0..1] Window Control (XE0WCR) 0x00060B44 # XOR Engine [0..1] Window Control (XE1WCR) 0x00060B50 # XOR Engine Base Address (XEBAR0) 0x00060B54 # XOR Engine Base Address (XEBAR1) 0x00060B58 # XOR Engine Base Address (XEBAR2) 0x00060B5C # XOR Engine Base Address (XEBAR3) 0x00060B60 # XOR Engine Base Address (XEBAR4) 0x00060B64 # XOR Engine Base Address (XEBAR5) 0x00060B68 # XOR Engine Base Address (XEBAR6) 0x00060B6C # XOR Engine Base Address (XEBAR7) 0x00060B70 # XOR Engine Size Mask (XESMR0) 0x00060B74 # XOR Engine Size Mask (XESMR1) 0x00060B78 # XOR Engine Size Mask (XESMR2) 0x00060B7C # XOR Engine Size Mask (XESMR3) 0x00060B80 # XOR Engine Size Mask (XESMR4) 0x00060B84 # XOR Engine Size Mask (XESMR5) 0x00060B88 # XOR Engine Size Mask (XESMR6) 0x00060B8C # XOR Engine Size Mask (XESMR7) 0x00060B90 # XOR Engine High Address Remap (XEHARR0) 0x00060B94 # XOR Engine High Address Remap (XEHARR1) 0x00060B98 # XOR Engine High Address Remap (XEHARR2) 0x00060B9C # XOR Engine High Address Remap (XEHARR3) 0x00060BA0 # XOR Engine [0..1] Address Override Control (XE0AOCR) 0x00060BA4 # XOR Engine [0..1] Address Override Control (XE1AOCR) 0x00060BB0 # XOR Engine [0..1] Destination Pointer (XE0DPR0) 0x00060BB4 # XOR Engine [0..1] Destination Pointer (XE1DPR0) 0x00060BC0 # XOR Engine[0..1] Block Size (XE0BSR) 0x00060BC4 # XOR Engine[0..1] Block Size (XE1BSR) 0x00060BD0 # XOR Engine Timer Mode Control (XETMCR) 0x00060BD4 # XOR Engine Timer Mode Initial Value (XETMIVR) 0x00060BD8 # XOR Engine Timer Mode Current Value (XETMCVR) 0x00060BE0 # XOR Engine Initial Value Low (XEIVRL) 0x00060BE4 # XOR Engine Initial Value High (XEIVRH) ### General Purpose Port Registers (page 239, 512ff) 0x00010100 # GPIO Data Out Register 0x00010104 # GPIO Data Out Enable Control Register 0x00010108 # GPIO Blink Enable Register 0x0001010C # GPIO Data In Polarity Register 0x00010110 # GPIO Data In Register 0x00010114 # GPIO Interrupt Cause Register 0x00010118 # GPIO Interrupt Mask Register 0x0001011C # GPIO Interrupt Level Mask Register ### Pins Multiplexing Interface Registers (page 239, 515ff) 0x00010000 # MPP Control 0 Register 0x00010004 # MPP Control 1 Register 0x00010050 # MPP Control 2 Register 0x00010008 # Device Multiplex Control Register 0x00010010 # Sample at Reset Register